1. Field of the Invention
The present invention relates to memory devices, and more particularly to a circuit for setting the width of input/output data in a semiconductor memory device, which uses anti-fuses to set the input/output data width at the package level of device manufacture.
2. Discussion of the Related Art
A memory device is a general term for all devices used for temporarily or permanently storing data, commands, and/or programs in a computer, communication system, image-processing system, and the like. Such memory devices can be classified as one of several types: semiconductor, magnetic tape, optical disc and so on, with the semiconductor memory device being the most widely used at present. The semiconductor type of memory device can be further classified according to its electrical characteristics, such as dynamic random access memory (DRAM), static random access memory (SRAM), flash memory, and read only memory (ROM). Among these, DRAM devices take a prominent position in the field.
Meanwhile, since a stored electrical potential may change over time, it is necessary to periodically perform a refresh process to restore the initial status of the stored electrical potential. In other words, since, in a read process of outputting data, a DRAM device detects and amplifies a voltage corresponding to the level of an electrical charge stored in a capacitor, the device is said to have a dynamic characteristic of periodically performing a refresh operation to prevent the destruction of data stored in memory cells.
When a memory device as above is installed into an actual system, the device acts as a main memory unit to store arithmetic results of a central processing unit (CPU). As memory capacity increases, the main memory improves in its data storing function. Accordingly, any increase in the data width for exchanging data with the CPU, as input/output (I/O) data, results in a proportional increase in the access bandwidth and improves data access times.
Due to assembly-related reasons, however, the data width may have to be set before advancing to the package stage of the manufacture of a memory device. To change the data width at the package level, the manufactures of DRAM devices may use one or more of several means: selectively cutting metal or polysilicon fuses provided in the DRAM circuit, forming interconnections using a metallization-layer mask and then etching, or connecting fuses at package level using a wire bonding method. The most common method is the selective cutting method, in which a laser beam is used to cut polysilicon fuses.
FIG. 1 is an I/O data width setting circuit of a conventional memory device. As shown in FIG. 1, the circuit is constructed with first and second fuse selectors 10 and 20 each of which are connected to an external supply voltage (Vext) and ground potential (Vss) and which receive signals transmitted through first (PAD.sub.1) and second (PAD.sub.2) pads, respectively, and a decoder 30 for decoding signals output from the fuse selectors, to output an internal voltage signal (Vint) and data width setting signals x4, x8, and x16. The first and second fuse selectors 10 and 20 employ polysilicon fuses.
The circuit thus constructed generates data width setting signals x4, x8, and x16 signals according to output signals from the first and second fuse selectors 10 and 20. The generation of these signals are summarized in Table 1, illustrating a variety of data widths to be set according to inputs to the circuit of FIG. 1.
TABLE 1 ______________________________________ pad.sub.1 pad.sub.2 data width ______________________________________ Vcc (H) Vcc (H) sixteen bits (x16) Vcc (H) Vss (L) eight bits (x8) Vss (L) Vcc (H) not applicable Vss (L) Vss (L) four bits (x4) ______________________________________
In other words, in order to make a change in the I/O data width of a memory device, the polysilicon fuses of the first and second fuse selectors 10 and 20 are selectively cut or wire-bonded to enable the first and second pads to be connected to the input of the decoder 30. Therefore, as the terminals supplying the external supply voltage and its ground potential are detached from the output of the first and second fuse selectors 10 and 20, an alternative voltage signal, in this case, represented by the Vcc and Vss of Table 1, is transmitted through the first and second pads and output to the decoder 30 without the influence of the external supply voltage. According to combination of the alternative voltage signals (Vcc or Vss) transmitted through the first and second pads as shown in Table 1, one of three types of data width setting signals x4, x8, and x16 is generated, to change the I/O data width of the memory device into four bits, eight bits, and sixteen bits, respectively.
Conventionally, the data width is changed with polysilicon fuses, wire bonding, or an etched metallization layer. The implementation of any one of these processes, however, must be carried out before advancement to the package level of the memory device. That is, none of these processes can be applied at the package level or after completion of the manufacture of the memory device.
In addition, the case of a selective cutting of fuses, the laser beam system which is typically used for the cutting step of the process is expensive. Moreover, the necessary pitch used for a plurality of such fuses inevitably increases the layout area of the memory device.
As described above, there has heretofore been no means available for resetting the data width beyond a predetermined stage of memory device manufacture, in particular, the package level of a DRAM device. Thus, the fluctuating demand for memory devices having a particular data width has resulted in shortages as well as excessive inventories. Therefore, a means for setting the I/O data width of a memory device, at the package level or subsequent steps of memory device fabrication, is needed.